Integrated circuits are typically fabricated using multiple layers of metallization to form the conductors used to connect various circuit elements. A given metallization layer is typically deposited over a processed semiconductor substrate and then etched to provide the desired pattern of conductors for that layer. The conductors of the given layer may be connected to other conductors of higher metallization layers as well as to semiconductor circuit elements previously formed in the substrate so as to provide the appropriate circuit functionality.
In general, it is desirable for any given metallization layer to have a metal density falling within specified minimum and maximum values in order for that layer to be formed properly during fabrication. The term "metal density" as used herein refers to the percentage of a given layer of metallization that includes metal after that layer is etched. The metal density may be measured, for example, in terms of the total area occupied by metal in an etched metallization layer, as a percentage of the total surface area of the corresponding integrated circuit. The minimum and maximum density values will typically vary depending upon factors such as the etching process and fabrication equipment used. If the metal density of the given metallization layer is either too low or too high, it is often difficult for fabrication equipment to etch the deposited metal layers reliably. For example, a metal density which is too high can result in the metal layer being over-etched, thereby removing required circuit connections. This type of excessive metal density problem can generally be resolved by, for example, appropriate distribution of conductors across multiple metallization layers or other suitable adjustment of the metallization layout. On the other hand, a metal density which is too low can overload an etching machine, which not only can result in unexpected connections, but can also result in metal thinning or voids in areas where connections are required.
Problems arising from insufficient metal density are typically rectified by forming metal "patches" in the low density metallization layer in order to provide an overall metal density which falls at or above a desired minimum value. The metal patches are arranged in various areas of the integrated circuit, and are generally connected to either ground or the substrate. However, this approach is inadequate in that adding metal patches connected to ground or the substrate tends to increase the parasitic capacitance associated with circuit nodes formed in the overlying or underlying metallization layers. A need therefore exists for a technique which can increase the metal density of a given metallization layer of an integrated circuit, without increasing the parasitic capacitance of circuit nodes in overlying or underlying metallization layers.